RISC-V lacks a bunch of really useful relatively easy to implement instructions and most extensions are truly optional so you can't rely on them. That's the problem if you let a bunch of academics turn your ISA into a paper mill.

In theory you can spend a lot of effort to make a flawed ISA perform, but it will be neither easy nor pretty e.g. real world Linux distros can't distribute optimised packages for every uarch from dual-issue in-order RV64GC to 8-wide OoO RV64 with all the bells and whistles. Only in (deeply) embedded systems can you retarget the toolchain and optimise for each damn architecture subset you encounter.

One crazy detail about the Pentium 4 is that even at 3.2GHz the simple integer ALUs ran at twice the clock speed. Which allows the cursed thing to run two add with carry instructions per cycle.

A Chinese company saying you don't need encryption. Why should anyone waste time debunking their bad faith "arguments"?

But won't anyone think of the little children?!? The US president and his close friends sure do. /s

It's nice to see people sharing their mistakes too.